Many forms of microelectronic devices such as IC (integrated circuit) packages include multiple semiconductor die (also, referred to herein as “die”) (such a package also known as a “Multi-Chip Package” or “MCP”). In some examples, the multiple die are coupled to a redistribution structure (termed in the art a “redistribution layer” or “RDL”) configured to establish interconnections between two or more of the multiple die within the MCP, and also to facilitate electrical and mechanical attachment to other devices (for example, a printed circuit board, such as a motherboard, or another modular assembly). Such an RDL may include one or more dielectric build-up layers, each build-up layer supporting conductive traces and vias to connect, directly or indirectly, with respective contacts on one or more semiconductor die and/or with vias in other layers of the RDL, to redistribute the die contacts to other locations. In the case of the “fan-out” RDLs used in such packages, the RDL may include electrical traces arranged to redistribute at least a portion, or all, of the contacts on a die to contact locations outside the lateral dimensions of the semiconductor die itself (the ‘footprint” of the die). Such fan-out RDLs also facilitate interconnections between the multiple die of an MCP.
Forming a MCP incorporating an RDL to interconnect two or more die typically involves placing the individual die on a mold carrier through use of an adhesive to maintain the die in fixed position relative to one another, with the active surfaces of the die contacting the adhesive. A mold compound will then be placed over the multiple die to encapsulate the die, and cured to form a “reconstituted wafer” including all the die. The reconstituted wafer may then be removed from the carrier and inverted to allow forming the desired layers of an RDL coupling to contacts on the active surfaces of the individual die.
A current trend in the industry is the packaging of increasing numbers of die together to provide greater functionality within a smaller form factor; and also while accommodating progressively finer pitches for contacts on the die. As a result, any shifting of the die relative to the mold carrier during the molding process, as can sometimes result with conventional processes, can significantly complicate forming of the layers of the RDL. This variability in the relative placement of the die of a MCP, can complicate the manufacturing process, such as by requiring imaging of the reconstituted wafer at each MCP site, and can also limit the resolution of traces and other conductive structures that can be formed in the RDL.